Kostas Pagiamtzis, Ph.D.

This website contains my scholarly publications, articles that I have written on various topics, and my photos.

I work as a circuit designer at Altera, San Jose primarily designing embedded SRAM memory for FPGA chips. I am also a Technical Editor for the International Solid-State Circuits Conference (ISSCC). ISSCC is the foremost conference on electronic circuit design and is unique among conferences in that the conference proceedings (digest) goes through a technical editing process.

In February 2006, I completed the Ph.D. degree in the Department of Electrical and Computer Engineering at the University of Toronto. I also received from the University of Toronto, the Master of Applied Science (M.A.Sc.) degree and the Bachelor of Applied Science (B.A.Sc.) degree in the Computer Engineering Option of the Engineering Science program.

My Erdős number is (at most) 5.

Research

My Ph.D. research was in the design of content-addressable memory (CAM). The key challenge in CAM is reducing power consumption without sacrificing speed or memory density. For an introduction to CAM architecture and circuits, please see my CAM Primer. I also maintain a list of scholarly CAM papers. My publications are primarily in the area of CAM.

More generally, I am interested in the design of SRAM memory and emerging non-volatile memory technologies such as ferroelectric RAM (FeRAM) and magnetoresistive RAM (MRAM).

Teaching

I have been a teaching assistant in the courses listed below. I received the Teaching Assistant Award in 2002, 2003, and 2005 by popular vote of the undergraduate students in the Dept. of Electrical and Computer Engineering at the University of Toronto. I wrote a short guide for aspiring TAs called The Art of TAing.